1. Field of the Invention
The invention relates to integrated circuit packages, and more particularly to an integrated circuit package having high yield and a method for fabricating the same.
2. Description of the Related Art
In integrated circuit device fabrication, an integrated circuit packaging step is performed. The integrated circuit, in which the packaging step is performed, can be used in a wide variety of applications, including computers, mobile phones and digital cameras. Yield of the integrated circuit package can affect performance of an integrated circuit device.
FIGS. 1A-1D are cross-sections of a conventional integrated circuit package. As shown in FIGS. 1A-1B, a protective layer 8 is formed on a covering plate 4 prior to bonding. FIGS. 1C-1D show a protective layer 8 formed on a covering plate 4 prior to bonding. In FIG. 1A, an integrated circuit chip 2, which has photosensitive devices 12 formed thereon and electrically connected to a bonding pad 6, is illustrated. A covering plate 4 is then attached to the integrated circuit chip 2 by an adhesive layer 10 to form a distance 14 between the covering plate 4 and the integrated circuit chip 2. During bonding of the covering plate 4 to the integrated circuit chip 2, the adhesive layer 10 overflows onto the photosensitive devices 12, as shown in FIG. 1A. FIG. 1B is a cross-section of the integrated circuit package, in which the adhesive layer 10 overflows onto the photosensitive devices 12 during bonding, in FIG. 1A. In FIG. 1B, the adhesive layer overflows onto the photosensitive device 12, and covers a portion of the photosensitive devices 12, so that sensitivity of the photosensitive devices 12 to light from covering plate 4 and distance 14 becomes uniform, which results in failure of the integrated circuit package.
In FIG. 1C, an integrated circuit chip 2 having photosensitive device 12 and a bonding pad 6 is provided. A protective layer 8 covers the bonding pad 6, which is electrically connected to the photosensitive devices 12. A covering plate 4 is subsequently attached to the integrated circuit chip 2 by an adhesive layer 10 to form a distance 14 therebetween. As shown in FIG. 1C, during bonding, the adhesive layer 10 overflows onto the photosensitive device 12 along a sidewall of the protective layer 8. FIG. 1D is a cross-section of an integrated circuit package, in which the adhesive layer 10 overflows onto the photosensitive devices 12 during bonding in FIG. 1C. The adhesive layer 10 overflows onto the photosensitive device 12 and covers a portion of photosensitive device 12, so that yield for fabricating the integrated circuit package, as shown in FIG. 1D, is reduced. Accordingly, the problems described occur in conventional bonding.
Thus, an integrated circuit package and fabrication method thereof is needed to eliminate the problems described and increase yield of fabrication.